Workshop Overview
Abstract
The future of computing systems is inevitably embracing a disaggregated and
composable pattern: from clusters of computers to pools of resources that can be dynamically combined
together and tailored around applications requirements. Transitioning to this new paradigm requires
ground-breaking research, ranging from new hardware architectures up to new models and abstractions at all
levels of the software stack.
Recent hardware advancements in CPU and interconnection technologies, enabled the possibility of
disaggregating peripherals and system memory. The memory system heterogeneity is further increasing,
composability and disaggregation are beneficial to increase memory capacity and improve memory utilization
in a cost-effective way, and reduce total cost of ownership.
Heterogeneous and Composable Disaggregated Systems (HCDS) provide a system design approach for reducing
the imbalance between workloads resource requirements and the static availability of resources in a
computing system.
The HCDS workshop aims at exploring the novel research ideas around composable disaggregated systems and
their integration with operating systems and software runtimes to maximize the benefit perceived from user
workloads.
Important Dates
These dates are tentative and may still change.
- Paper submission deadline:
March 1st 2024 (AoE)March 8th 2024 (AoE) - Extended - Author notification:
March 19th 2024 (AoE)March 20th 2024 (AoE) - Extended - Camera ready submissions: March 25th 2024 (AoE)
- Workshop: April 28, 2024
Call for Papers
Hardware and Prototyping
- Novel composable systems architectures (e.g., CXL based)
- Composable system prototypes and proof-of-concept
- Interconnect technologies (such as CXL)
- Memory pooling, and memory disaggregation
Modeling and Evaluation
- Heterogeneous Composable Systems simulation
- Characterization of heterogeneous composable systems from the perspective of performance, energy consumption and reliability
- New algorithms and performance models to manage and use HCDS
- Memory pooling, and memory disaggregation
System software and programming models/tools
- Operating system designs to support HCDS, such as memory profiling methods, page migration and allocation, and huge pages
- Control plane software and runtime systems for management of composable systems
- Programming models for heterogeneous composable memory
- Analysis / profiling tools and techniques for composable systems
- Virtualization for composable heterogeneous systems
Applications and Use cases
- Use cases for heterogeneous composable systems, such as (but not limited to) deep-learning inference and scientific applications
Submission Instructions
Each manuscript will be evaluated with a double-blind review
process. Authors must omit at submission time their names or any information that can disclose
their identity. Manuscripts must not exceed 4-pages including figures and
tables but excluding references. All manuscripts must use the sigconf ACM conference style. It is also
expected that all accepted papers will be presented at the workshop by one of the authors.
The workshop proceedings will be published on Arxiv and further instructions on camera ready submission
will be given in due time.
Submit your work here.
Workshop Program
13:45 – 14:00 | Opening Remarks |
14:00 – 15:00 |
Keynote: Composable Systems and Services for AI-enabled Data-driven
Research and Education Workflows Ilkay Altintas (UC San Diego/San Diego Supercomputer Center) Abstract: Scientific computing is increasingly merging with machine learning and artificial intelligence, demanding specialized frameworks for managing distributed data and computing. This trend has led to the rise of new systems that facilitate dynamic container orchestration and integration across varied resource pools, coined composable systems. The presentation will detail a strategy and lessons learned for using composable systems for workflows at the intersection of computing, AI, and sensor data, focusing on a case study that combines Expanse, a supercomputer, with Nautilus, a Kubernetes-based GPU cluster, and Sage, an edge AI infrastructure. By showcasing lessons learned from applications in hazard management and the Internet of Things, the talk will illustrate the importance of integrated workflows to unite dynamic, data-driven science with composable infrastructures, underscoring their impact on scientific discovery. We will also overview the National Data Platform, a federated and extensible data and service ecosystem to promote collaboration, innovation and equitable use of data on top of existing composable cyberinfrastructure capabilities. |
15:00 – 15:30 | Break |
15:30 – 15:45 |
UDON - A case for offloading to general purpose compute on CXL
memory
Jon Hermes (Arm), Josh Minor (Arm), Minjun Wu (Arm), Adarsh Patil (Arm), Eric van Hensbergen (Arm) |
15:45 – 16:00 |
Streamlining CXL Adoption for Hyperscale Efficiency
Nilesh Shah (ZeroPoint Technologies), Angelos Arelakis (ZeroPoint Technologies), Dimitrios Palyvos-Giannas (ZeroPoint Technologies), Yiannis Nikolakopoulos (ZeroPoint Technologies), Klas Moreau (ZeroPoint Technologies) |
16:00 – 16:15 |
Leveraging Apache Arrow for Zero-copy, Zero-serialization Cluster
Shared Memory Philip Groet (University of Technology Delft), Joost Hoozemans (Voltron Data), Andreas Grapentin (Hasso Plattner Institute, University of Potsdam), Felix Eberhardt (Hasso Plattner Institute, University of Potsdam), Zaid Al-Ars (University of Technology Delft), Peter Hofstee (IBM) |
16:15 – 16:30 |
Towards Disaggregation-Native Data Streaming between
Devices Nils Asmussen (Barkhausen Institut), Michael Roitzsch (Barkhausen Institut) |
16:30 – 16:45 | Break |
16:45 – 17:00 |
Scaling to 32 GPUs on a Novel Composable System
Architecture John Ihnotic (GigaIO) |
17:00 – 17:15 |
TEGRA - Scaling Up Terascale Graph Processing with Disaggregated
Computing William Shaddix (UC Davis), Mahyar Samani (UC Davis), Marjan Fariborz (Ayar Labs), S.J. Ben Yoo (UC Davis), Jason Lowe-Power (UC Davis), Venkatesh Akella (UC Davis) |
17:15 – 17:30 |
Memory Sharing with CXL: Hardware and Software Design
Approaches Sunita Jain (Advanced Micro Devices, Inc.), Nagaradhesh Yeleswarapu (Advanced Micro Devices, Inc.), Hasan Al Maruf (Advanced Micro Devices, Inc.), Rita Gupta (Advanced Micro Devices, Inc.) |
17:30 – 17:45 |
Fork is All You Needed Zixuan Wang (UC San Diego), Jishen Zhao (UC San Diego) |
17:45 – 18:00 | Closing Remarks |
Committees
Organizing Committee
- Christian Pinto (IBM Research Europe, Ireland)
- Dong Li (UC Merced, CA, USA)
- Thaleia Dimitra Doudali (IMDEA Software Institute, Spain)
Program Co-Chairs
- Christina Giannoula (University of Toronto, Canada)
- Jie Ren (William & Mary, VA, USA)
Program Committee
- Kyle Hale (Illinois Tech)
- Vassilis Vassiliadis (IBM Research Europe)
- João Pedro Barreto (INESC-ID, Universidade de Lisboa)
- Haris Volos (University of Cyprus)
- Lance Long (University of Illinois Chicago)
- Dimosthenis Masouros (National Technical University of Athens)
- Michael Aguilar (Sandia National Labs)
- Themis Melissaris (Snowflake)
- Andreas Grapentin (Hasso Plattner Institute)
- Felix Eberhardt (IBM)
- Sergey Blagodurov (AMD Research)
- Ivan Fernandez Vega (Barcelona Supercomputing Center)
- Juan Gomez Luna (NVIDIA)
- Haiyu Mao (ETH Zurich)
- Konstantina Koliogeorgi (NTUA)
- Nikela Papadopoulou (Glasgow)
- Chloe Alverti (UIUC)
- Cyril Guyot (Western Digital)
- Antonio J. Peña (Barcelona Supercomputing Center)
- Hasan Al Maruf (AMD)
- Radhakrishnan Venkataramani (Snowflake)
- Archit Patke (UIUC)
- Constantinos Evangelinos (IBM Research)
- Haris Volos (University of Cyprus)
- Phil Cayton (Intel)
- Russ Herrell (Hewlett Packard Enterprise)
Past Editions
Contacts
Email Us: hcdsworkshop[at]gmail[dot]com for any question.